1. Field of the Invention
The present invention relates to a power supply operable during a hold-up time and thus capable of reducing output loss.
2. Description of the Related Art
In general, a phase shifted full bridge (PSFB) converter is widely used as a direct current (DC) to DC converter in a power supply. This is due to the fact that such a PSFB converter places less stress on a semiconductor device and allows zero voltage switching, and is thus suitable for high capacity applications.
The DC to DC converter needs to meet hold-up time requirements. That is, since a load is to be powered for a certain period of time, even if an input alternating current power supply is interrupted due to failure, the DC to DC converter supplies power from the direct current link voltage charged in a capacitor in the input terminal of the power supply. However, the direct current link voltage is reduced over time, and thus a duty ratio is required to be increased in order to supply a constant amount of power to the load by taking the reduction in the direct current link voltage into consideration.
Accordingly, the DC to DC converter needs to be designed to accept a wider range of input voltage levels, and consequently it has a small duty ratio in a normal state (i.e., a nominal state).
Therefore, the PSFB has the problem in that efficiency in supplying power is lowered.
Patent Document 1, referenced below, relates to a PSFB, but does not teach operating during a hold-up time to reduce loss.